[WIP] Active Precharge Board
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Overview
Old Design
Problem
Research
Solution
Problem: Edge Cases
Just using a simple comparator will work theoretically when there is just one contactor that will connect the battery to the motor. However, in the actual HV diagram, there are several other contactors and factors that have to be considered. For example, prior to closing the battery contactor, the voltages on both sides of the precharge resistor are the same. This may cause the precharge board to close the contactor in certain cases. Then, if the battery is connected, the inrush current will bypass the precharge resistor directly through the contactor.
To solve these issues, we decided to add a few failsafes including an nmos that takes HVref as the gate signal. This prevents the case where voltage on both sides is zero. Additionally, hysteresis is used to prevent a rapid switching on and off when the reference voltage crosses the threshold on the comparator. We compiled the following table on the situations for every single contactor and the possible states they could be in. 0 indicates open, 1 indicates closed, and MP+ and AP+ are the indicated future state of motor precharge and array precharge.
BPS | Motor Contactor | Array Contactor | Motor Precharge | Array Precharge | MP+ | AP+ |
---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 1 | 0 | 0 |
0 | 0 | 0 | 1 | 0 | 0 | 0 |
0 | 0 | 0 | 1 | 1 | 0 | 0 |
0 | 0 | 1 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 1 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 1 | 0 | 0 |
0 | 1 | 0 | 0 | 0 | 0 | 0 |
0 | 1 | 0 | 0 | 1 | 0 | 0 |
0 | 1 | 0 | 1 | 0 | 0 | 0 |
0 | 1 | 0 | 1 | 1 | 0 | 0 |
0 | 1 | 1 | 0 | 0 | 1 | 1 |
0 | 1 | 1 | 0 | 1 | 1 | 1 |
0 | 1 | 1 | 1 | 0 | 1 | 1 |
0 | 1 | 1 | 1 | 1 | 1 | 1 |
1 | 0 | 0 | 0 | 0 | 0 | 0/1 |
1 | 0 | 0 | 0 | 1 | 0 | 0/1 |
1 | 0 | 0 | 1 | 0 | 0 | 0/1 |
1 | 0 | 0 | 1 | 1 | 0 | 0/1 |
1 | 0 | 1 | 0 | 0 | 0 | 1 |
1 | 0 | 1 | 0 | 1 | 0 | 1 |
1 | 0 | 1 | 1 | 0 | 0 | 1 |
1 | 0 | 1 | 1 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 0 | 1 | 0/1 |
1 | 1 | 0 | 0 | 1 | 1 | 0/1 |
1 | 1 | 0 | 1 | 0 | 1 | 0/1 |
1 | 1 | 0 | 1 | 1 | 1 | 0/1 |
1 | 1 | 1 | 0 | 0 | 1 | 1 |
1 | 1 | 1 | 0 | 1 | 1 | 1 |
1 | 1 | 1 | 1 | 0 | 1 | 1 |
The highlighted sections are not ideal; however, they have been determined to either be impossible states to reach or fine and probably won’t cause problems.
Design Options
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