BPS-Amperes Board

Github Link: https://github.com/lhr-solar/BPS-AmperesPCB

BOM Link: https://www.mouser.com/ProjectManager/ProjectDetail.aspx?AccessID=2bc1527826
 

Brief Description/Purpose: 

What does this circuit do? Why do we need it?

This board takes inputs from the Shunt Resistor board and outputs a normalized analog reading to the BPS Peripheral SOM. The Shunt Resistor board holds an extremely small resistance current sense resistor that allows this board to measure the current across it and thus the battery to eventually be used to interpolate the state of the battery. 

This board interfaces with the Shunt Resistor Board and the BPS Peripheral SOM:

  • For the Shunt Resistor Board, this board receives Shunt Resistor Low (RSHL) and Shunt Resistor High (RSHH) through J2 as well as being a passthrough for the Shunt, Test, V+, and V- test connections J3 connects to the board and J4 is the passthrough.
  • For the BPS Peripheral SOM, this board receives 3.3V power and outputs the normalized analog reading from the Shunt Resistor to A1 (Pin 20) through J1.

 

Pertinent Regulation(s) 

Link to Regs: https://www.americansolarchallenge.org/regulations/2024-american-solar-challenge-regulations/ 

Regulation 

Description of the Regulation 

How Regulation is Met 

8.3.B.1

Li-Based: All lithium based battery packs must have active protection such that over-voltage,
over-temperature (for charge and discharge rating), over-current and under-voltage cause the Main
Power Switch per 8.6.A to open and to electrically isolate the source or sink for the vehicle. The level of
protection measurement is required down to the module level at a minimum and may be required at a cell
level depending on the cell manufacturer. Fuses per Reg. 8.5 are not allowed for battery over-current
protection.

This is one of the reasons the BPS-Amperes board exists as over-current protection for the battery cannot be applied using a fuse.

 

Context

Location of the Board: The BPS-Amperes board will be in the electronics enclosure sandwiched between the BPS-Peripheral SOM and the Shunt Resistor Board.

List of I/O and Connections: 

#

Name

Type

Ideal Voltage

Notes

J1PERPH SOM CONN2x10 Molex Slim Stack+3.3V5.5 mm tall
J2SHUNT CONN1x05_P2.54mm_Vertical Female+3.3V4.5 mm tall
J3PASSTHRU CONN1x05_P2.54mm_Vertical Female+3.3V4.5 mm tall
J4TEST CONN1x02_P2.54mm_Horizontal Male+12V2.5 mm tall

Main

Schematic

List of Circuit Components  

INA186A3IDDFT 

  • Description: Current Sense Amplifier
  • Why is it necessary: Senses the difference across the terminals of the Shunt Resistor and uses a 100V/V division and sends that analog signal to microcontroller on BPS Peripheral SOM
  • Justification for selection of specific part: Low power draw and 100V/V was enough to have high resolution
  • Datasheet link: https://www.ti.com/lit/ds/symlink/ina186.pdf?ts=1725036106734&ref_url=https%253A%252F%252Fwww.mouser.com%252F
  • Associated passives/components: 
    • Shunt Resistor
    • Filtering capacitor on VS (0.1uF)
  • Notes: Originally had an ADC then sent that signal to the BPS Peripheral SOM, but there was an Analog pin available on the SOM, so ended up using that instead.

REF1930AIDDCT 

  • Description: 3.3V to 3.0V and 1.5V Voltage Reference
  • Why is it necessary: This Voltage Reference generates the correct voltage to be able to accurately compare the voltage change of the Shunt Resistor
  • Justification for selection of specific part: Designed to work with the INA18XX chips, was cheap and available, and able to handle the current requirements.
  • Datasheet link: https://www.ti.com/lit/ds/symlink/ref1930.pdf?ts=1725121873616&ref_url=https%253A%252F%252Fwww.mouser.com%252F
  • Associated passives/components: 
    • Filtering capacitors (100nF and 1uF)
    • INA186A3IDDFT

Layout 

Dimensions: 40mm x 50mm

Requirements/Constraints:  Fit between BPS Peripheral SOM and Shunt Resistor board in Electrical enclosure

Design Choices:  

  • Horizontal Passthrough Connector and test points for testing when in the stack
  • Stitching vias to limit noise around edges
  • All analog components located on side opposite to BPS Peripheral SOM to limit noise

PCB: 

 

3D Model:  

 

Additional Considerations 

INA Chip now not available

Related pages